1. Field of the Invention
The present invention relates to a content addressable memory device including a plurality of memory banks and, in particular, to a content addressable memory device that excludes a faulty memory bank.
2. Description of the Related Art
A content addressable memory (hereinafter referred to as CAM) device has been in widespread use. The CAM device includes a plurality of memory words (hereinafter simply referred to as words) for storing data, receives search data, and searches for a word storing data corresponding to the input search data. Typically, redundant words in reserve are arranged in CAM devices, and if and when a faulty word containing a defective element is found in a shipping inspection, the CAM device is treated as a good product with the faulty word replaced with the reserved word. In this way, the manufacturing yield of the CAM devices is heightened.
For example, a CAM device technique having a plurality of reserved words is proposed in a paper entitled “A 1-Mb 2-Tr/b Nonvolatile CAM Based on Flash Memory Technologies” authored by Tohru Miwa et al. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 31, NO. 11, NOVEMBER 1996 pp. 1601-1608.
In the disclosed technique, if one faulty word is present, the address of the fault word is memorized. If an address input, from the outside, to write data to or to read data from a word is equal to or larger than the address of the fault word, 1 is added to the input address. The resulting address is then output to an address decoder. If an address of a word hit during a search operation is larger than the address of the faulty word, 1 is subtracted from the address. The resulting address is output to the outside.
Japanese Patent Application Publication No. 2000-30487 discloses a dynamic RAM including a number of banks, each bank containing redundant elements for covering a faulty element. The RAM includes a bank enable register that stores the information of a bank that is not rescued because the number of faulty elements is larger than the number of redundant elements. The dynamic RAM is shipped as a mostly good memory. A predetermined number of such RAMs are combined forming a memory module. A memory controller is then arranged, which reads the content of each bank enable register, and assigns addresses to respective banks while excluding the unrescued banks from address assignment.
But, with the above disclosed techniques, the CAM device cannot be rescued if words in excess of the predetermined number of reserved words are detected as faulty. Thus the disclosed techniques fail to lead to a high manufacturing yield of the CAM devices.
In accordance with the technique disclosed in Japanese Patent Application Publication No. 2000-30487, the memory controller is arranged not in the dynamic RAM chip, but as a member of the memory module, which further includes a plurality of dynamic RAM chips. The structure of the memory controller is not specifically disclosed.
Furthermore, the CAM device has an additional feature in the operation thereof. In searching, even an address of a word outputting a match signal needs to be address converted. That is, it is not sufficient to assign the addresses of the fault words to the addresses of the words.